The present invention relates to a semiconductor integrated circuit and, more particularly, to a boost signal generating circuit of a MOS type integrated circuit.
FIG. 1 shows a circuit diagram of a conventional boost signal generating circuit of this type, in which reference numerals 1 and 2 respectively indicate a load capacitor whose value is C.sub.1 and a boost capacitor whose value is C.sub.2, and .phi..sub.A and .phi..sub.B indicate a signal to be boosted and a boosting signal. FIG. 2 shows waveforms of the respective signals .phi..sub.A and .phi..sub.B when the circuit in FIG. 1 is operating.
When the circuit is in operation, the boosted signal .phi..sub.A starts to charge the load capacitor 1 and the boost capacitor 2 at a time instant t.sub.1. At a time instant t.sub.2, the potential of the signal .phi..sub.A reaches a value corresponding to the source voltage V or a value slightly lower than the source voltage V. The boosting signal .phi..sub.B starts to rise at the time instant t.sub.2, and the signal .phi..sub.A rises to a value higher than the source voltage V during the time period from t.sub.2 to t.sub.3 due to the effects of the boosting signal .phi..sub.B and the boost capacitor 2. The maximum boosted voltage of the signal .phi..sub.A is ##EQU1##
Therefore, in order to obtain a higher boosted voltage, the capacitance C.sub.2 should be increased, but doing so results in a larger power being consumed for charging the capacitor and the time period from t.sub.1 to t.sub.2 being lengthened.
Describing this in more detail with reference to FIG. 3, which shows a boost signal generating circuit for supplying the boosted signal .phi..sub.A to the word line 5 of a semiconductor memory device such as a DRAM, a MOS transistor 3 connected between the voltage source V and one end of a boost capacitor 2 is assumed in a nonconductive state before a time instant t.sub.1 and is turned on by a signal supplied to its gate after the time t.sub.1. A MOS transistor 4, connected between the voltage source V and the other end of the capacitor 2, is assumed in a nonconductive state before a time instant t.sub.2 and turned on by a signal supplied to its gate after t.sub.2.
In this circuit, the charging time T required for the boosted signal .phi..sub.A to reach the maximum value of ##EQU2## namely, the time from t.sub.1 to t.sub.3, can be represented by: EQU T=T.sub.1 +T.sub.2
where T.sub.1 =t.sub.2 -t.sub.1 and T.sub.2 =t.sub.3 -t.sub.2
Since only the MOS transistor 3 is in a conductive state before the time t.sub.2, EQU T.sub.1 .gtoreq.r.sub.1 (C.sub.1 +C.sub.2)
where r.sub.1 is the equivalent resistance of the MOS transistor 3 in the conductive state.
Since the MOS transistor 4 is turned on at the time t.sub.2, ##EQU3## where r.sub.2 is the equivalent resistance of the MOS transistor 4 in the conductive state.
If the resistances r.sub.1 and r.sub.2 have substantially the same value and the capacitance C.sub.2 of the boost capacitor 2 is equal to the capacitance C.sub.1 of the load capacitor 1 (which may be the stray capacitance of the word line 5), ##EQU4## where t.sub.1 =r.sub.1 C.sub.1.
In a typical application, when the word line 5 is boosted, t.sub.1 is about 10 to 20 ns, and thus the charging time required is about 25 to 50 ns.